Modelling and region stability analysis of wind turbines with battery energy storage system based on switched system with multi-equilibriums

This paper deals with the modelling and control for wind turbine combined with a battery energy storage system (WT/BESS). A proportional-integral (PI) controller of pitch angle is applied to adjust the output power of WT, and a method for battery scheduling is presented for maintaining the state of charging (SOC) of BESS. When the battery level is below the lower limit, we increase the expected output power of wind turbine through raising the operation point to charge the battery. Considering the effect of charging/discharging, a switched linear system model with two equilibriums is presented firstly for such WT/BESS system. The region stability is analyzed and an approach for estimating the corresponding stable region is also given. The effectiveness of the proposed results is demonstrated by a numerical example

Tourism: an alternative to development?: reconsidering farming, tourism and conservation incentives in Northwest Yunnan mountainous communities

In the last decade, tourism has developed rapidly in the mountainous areas of northwest Yunnan. This growth has led to substantial economic and social changes, with resulting environmental consequences. This article uses a case study to illustrate how local farmers involved in tourism changed their agricultural practices as a result of the transformations that took place in the area. The aim was to examine tourism's expected benefits of poverty alleviation and conservation incentives. Tourism investments were found to have been adopted only by households with available cash and labor, whereas they remained inaccessible for the poor, small landowners who most needed a new source of income and used their land more exhaustively. Relatively rich, large landowners did not take the opportunity to reduce their agricultural activities. Instead, they used supplementary incomes earned from tourism to hire external labor to cultivate their land more intensely. Tourism development failed to generate real incentives for mountain farmers to adopt more conservation measures and prevent soil erosion and nonpoint source agricultural water pollution, which currently constitute serious environmental problems for mountain environments in Yunnan. This article presents recommendations based on the conclusions of the study

A GIS approach towards estimating tourist's off-road use in a mountainous protected area of Northwest Yunnan, China

To address the environmental impacts of tourism in protected areas, park managers need to understand the spatial distribution of tourist use. Standard monitoring measures (tourist surveys and counting and tracking techniques) are not sufficient to accomplish this task, in particular for off-road travel. This article predicts tourists' spatial use patterns through an alternative approach: park accessibility measurement. Naismith's rule and geographical information system's anisotropic cost analysis are integrated into the modeling process, which results in a more realistic measure of off-road accessibility than that provided by other measures. The method is applied to a mountainous United Nations Educational, Scientific and Cultural Organization (UNESCO) World Heritage Site in northwest Yunnan Province, China, where there is increasing concern about potential impacts of unregulated tourist use. Based on the assumption that accessibility tends to attract more tourists, a spatial pattern of predicted off-road use by tourists is derived. This pattern provides information that can help park managers develop strategies that are effective for both tourism management and species conservation

A High Performance Advanced Encryption Standard (AES) Encrypted On-Chip Bus Architecture for Internet-of-Things (IoT) System-on-Chips (SoC)

With industry expectations of billions of Internet-connected things, commonly referred to as the IoT, we see a growing demand for high-performance on-chip bus architectures with the following attributes: small scale, low energy, high security, and highly configurable structures for integration, verification, and performance estimation. Our research thus mainly focuses on addressing these key problems and finding the balance among all these requirements that often work against each other. First of all, we proposed a low-cost and low-power System-on-Chips (SoCs) architecture (IBUS) that can frame data transfers differently. The IBUS protocol provides two novel transfer modes – the block and state modes, and is also backward compatible with the conventional linear mode. In order to evaluate the bus performance automatically and accurately, we also proposed an evaluation methodology based on the standard circuit design flow. Experimental results show that the IBUS based design uses the least hardware resource and reduces energy consumption to a half of an AMBA Advanced High-Performance Bus (AHB) and Advanced eXensible Interface (AXI). Additionally, the valid bandwidth of the IBUS based design is 2.3 and 1.6 times, respectively, compared with the AHB and AXI based implementations. As IoT advances, privacy and security issues become top tier concerns in addition to the high performance requirement of embedded chips. To leverage limited resources for tiny size chips and overhead cost for complex security mechanisms, we further proposed an advanced IBUS architecture to provide a structural support for the block-based AES algorithm. Our results show that the IBUS based AES-encrypted design costs less in terms of hardware resource and dynamic energy (60.2%), and achieves higher throughput (x1.6) compared with AXI. Effectively dealing with the automation in design and verification for mixed-signal integrated circuits is a critical problem, particularly when the bus architecture is new. Therefore, we further proposed a configurable and synthesizable IBUS design methodology. The flexible structure, together with bus wrappers, direct memory access (DMA), AES engine, memory controller, several mixed-signal verification intellectual properties (VIPs), and bus performance models (BPMs), forms the basic for integrated circuit design, allowing engineers to integrate application-specific modules and other peripherals to create complex SoCs